One or more aspects relate, in general, to processing within a multiprocessor computing environment, and in particular to, synchronizing updates of status indicators in page tables used by the multiprocessor computing environment.
Page tables are data structures used to store the mapping between virtual addresses and physical addresses. Virtual addresses are associated with virtual memory, which is used to provide the appearance of additional physical memory. As is known, physical memory is of a defined size and in order to have the physical memory appear larger than it is, virtual memory is utilized. The virtual memory is mapped to physical memory, and techniques are provided to use the virtual addresses to locate page table entries, which include the physical addresses used to access physical memory.
Each page table entry includes status indicators used in managing the entry and/or page of memory associated with the entry. Further, to optimize performance, cached copies of the page table entries are maintained in caches, such as translation lookaside buffers (TLBs). Thus, when a page table entry is revised, the cached copy is to be updated or invalidated, and when the cached copy is updated, the updates are to be reflected in the page table.